While some have given up on Moore’s Law, Intel CEO Pat Gelsinger clearly hasn’t. “For decades now, I’ve been in the debate: is Moore’s Law dead? And the answer is no,” he said, during his keynote at the Intel Innovation event this week.
Despite an ample number of naysayers, Gelsinger argues there is plenty of untapped life in the law when it comes to transistor design, power delivery, lithography, and packaging for 100-billion-transistor dies in the near future, and trillions of transistors in a single package by the end of the decade.
At the core of the life-extension belief is advanced packaging. According to Gelsinger, and anyone else paying attention to chip fabrication, we’re approaching the limits of what can be practically achieved on a single die. “Even Gordon Moore, when he wrote his original paper on Moore’s law, saw this day of reckoning where we’ll need to build larger systems out of smaller functions, combining heterogeneous and customized solutions,” said the chief exec.
Intel is betting on its packaging technology and heterogeneous dies – placing different types of dies in a single processor package, all connected up internally – to keep Moore’s law alive a little bit longer. You tend to get better manufacturing yields when making lots of smaller dies, versus big monolithic ones, among other benefits.
This is just what, for one, AMD has been doing for years successfully, and arguably helped fuel its rejuvenation as a supplier of x86 chips. AMD has been packing multiple dies of Zen CPU cores and IO circuitry into individual processor packages, selling them as its Ryzen PC and Epyc server chips – the dies, aka chiplets, being made mostly by TSMC and some by GlobalFoundries, depending on the model.
Not to mention Nvidia and Apple are also moving to multi-die packages, each in their own way.
Intel's following suit. Its EMIB and Foveros 2D and 3D multi-die packaging tech will be at the heart of its Sapphire Rapids server CPUs and Ponte Vecchio accelerator GPUs, though neither of them are commercially available quite yet.
Intel’s ambitions for this packaging tech aren’t limited to its own silicon. The company is a founding member of the Universal Chiplet Interconnect Express (UCIe) consortium working to standardize the way chiplets from various vendors talk to one another. UCIe has already seen buy-in from some of the largest chipmakers and foundry operators, including TSMC and Samsung Electronics.
Gelsinger painted a picture in which Intel Foundry Services (IFS) — the company’s contract chip manufacturing arm — would package chiplets from Intel, TSMC, GlobalFoundries, Texas Instruments, and others into single cohesive products.
